Fix regression from 6701fbe5f0 .
The rdhwr instruction is unsupported by mips32r1 cpus, but is
supported via kernel emulation on those cpus.
Change-Id: Ieb3343fff0f0da54003044f451c90e1c761208eb
Avoid ambiguity by using register numbers. Register names are
interpreted depending on the ABI. Fixes the issue with mips64 gcc,
where registers t0-t4 are translated into $8-$11 (o32 ABI) instead
of $12-$15 (o64 ABI).
Also, use t9 ($25) for storing function address
(in getProcAddress.cpp).
Change-Id: I12ef5cd98bf14dab3c01f2756889cc02856c1cd8
Combines 4 patches by Dragoslav and Douglas:
Use t9 to hold the address of the called function.
Add support for gl binding.
Fix inline assembly code to be R6 compatible.
Fix some more inline assembly code to be R6 compatible.
Change-Id: I0b899813790b2ba4ca538bb21692014cc1933f66
Wrapper functions were broken on builds that forced -fno-omit-frame-pointer flag.
Change-Id: I5a80f9587fb3db821b4156af56acda59a0b4579b
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Yong Yao <yong.yao@intel.com>
There was no explicit support for x86/64 architecture in EGL/GLES wrappers.
This resulted either in failures or sub-optimal implementation of the wrapper functions.
Change-Id: I20d99d7372fbf642ee4b94a05c8cb971cba29988
Signed-off-by: Wajdeczko, Michal <michal.wajdeczko@intel.com>
in the common case this saves one instructions per jump
(which will help with the i-cache).
this change also gets rid of the "use slow tls" option,
which was useless. So at least now architectures that don't have
assembly bindings will perform much better.
Change-Id: I31be6c06ad2136b50ef3a1ac14682d7812ad40d2
when increasing MAX_NUMBER_OF_GL_EXTENSIONS to 256
we also needed to create all the corresponding wrappers.
Change-Id: I90edaaf0885ccdfab48e7a1396bcf88e039cfb25
Duane Sand